The position is for a DFT engineer inside the DFT methodology and flow development team within the Network Custom Solutions NCS group.
In this position you will be responsible for developing and proving in DFT solutions that will eventually be implemented in NCS products. You will be responsible to enable and ensure that all products meet customer DFT requirements as well as hit DPPM goals.
The position also involves close collaboration with pre-silicon and post-silicon team to ensure robust validation and hitting the required coverage goals. Oversees definition, design, verification and documentation for DFT solutions with focus area in Scan Test.
The candidate much be able to have effective communication and interaction with design teams as well as central IP delivery teams. Candidate must be self-motivated and take up all required initiatives to gather the state of the art DFT solutions, identify applicability to NCS products and drive towards getting the solutions implemented on next generation products. Candidate must be able to effectively communicate with peers and managers.
BSEE and 3+ years in MSEE and 2+ in design and DFT.
Expertise in DFT solutions around Memory test and digital logic testing.
Expertise in DFT EDA tools, understanding of SOC design flows. Perl programming skills are highly desired
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.