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Job ID: JR0010246
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations: California, San Jose;
Job Type: Experienced Hire

Test Development Engineer

Job Description

Responsible for ensuring the testability and manufacturability of FPGA devices from the component feasibility stage through production ramp. Makes significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert test vectors and drive automatic test equipment. Creates and tests validation and production test hardware solutions. Tests and validates circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.


Qualifications

This position is for a Sort and Class Test Program Architecture Product Development Engineer in the Programmable Solutions Group PSG. In this role, you will be expected to be a part of and participate in global teams in developing wafer-level Sort test programs and/or package-level Class test programs to enable TD's process development and Intel's product roadmap for FPGA products on lead processes or lead architectures. The responsibilities of this position include, but are not limited to, the following: Performing evaluation, development, and debug of new test programs, methods and methodologies Development of test program flows, working with the module/content owners and senior test program architecture engineers to build test programs from definition, through integration and validation, to release in HVM environment Development and debug of software tools to support sort/class test program development Strong participation and active contribution to global working groups dedicated to identifying and meeting current and future test challenges Statistical analysis of tested parameters and working with partner organizations to define optimal sort/class test pass/fail criteria Provide debug support, working with module/content owners on the tester platform Data analysis and deployment of solutions to improve test coverage, test time, yield, hardware capacity, and other product health indicators PHI's. Keen attention to details, with a conscious focus towards efficiency and convergence via sort/class test methodologies, standardization, and proliferation of best practices across products and product segments.

Minimum Qualifications:
• BS or MS degree in Electrical Engineering/Computer Engineering/Computer Science
• 2-4 years of experience in FPGA, ASIC or analog test method and tester knowledge
• Hardware language, software programming skill or scripting skill, such as RTL, C or Python

Preferred Qualifications: In addition to the required/minimum qualifications, the ideal candidate would have many or all of the following skills:
- Knowledge of FPGA architecture, Design For Test (DFT) principles, manufacturing test principles.
- Experience bringing test content to the ATE environment: ranging from writing the tests, writing or configuring the conversion software state equations and supporting flows, to debugging the content on RTL, emulator or ATE.
- Knowledge/course work in semiconductor device physics, fundamentals of testing, digital electronics principles, FPGA or microprocessor basics, basics of VLSI design, programming, computer architecture, data structures
- Self-driven and strong team player
- Excellent communication skills, verbal and written.
- Knowledge of statistical data analysis
- Experience creating generic SW solutions with high code reuse, creating unit tests, participating in design and code reviews.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

California, San Jose;


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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