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Job ID: JR0011677
Job Category: Engineering
Primary Location: Singapore, Central Singapore SG
Other Locations:
Job Type:

Staff Engineer SoC Design HSIO

Job Description

• Working closely with concept engineering team to define the subsystems requirements

• Lab validation and debug of High Speed Interfaces

• Signal and power integrity verification

• RTL design and Functional verification, pre and post layout

• Logic synthesis and timing verification - desired

• Masters or Bachelor degree in Electrical Engineering, Communications or equivalent university programs • 12+ years of relevant experience • In depth knowledge of high speed interface protocol like PCIe, SATA , USB3.0 and DDR3 • Strong experience in design, verification of the high speed interface PCS/PMA digital layers • In depth understanding of ASIC integration of the re-usable IP subsystems (PHY and controller) into complex SOC platforms • Should have good hands on experience with the high speed scopes, network analysers, protocol analysers and lab equipment for high speed interfaces compliance and lab verification • Working knowledge on the signal and power integrity aspects at system level for the high speed interfaces would be advantage • Good communication skills, open and collaborative working style within larger international teams • Working accurately and thoroughly within target timelines

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