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Job ID: JR0002507
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations:
Job Type: Experienced Hire

Pre-Si Valid/Verif Engineer

Job Description

Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.


Qualifications

Job responsibilities include writing verification test plans, and then writing tests to execute those plans. Development of verification collateral, such as behavioral checkers or coverage monitors, is often required to enable test plan execution. Candidates will need to debug failing tests, then work with designers and architects to resolve bugs. Successful verification engineers can anticipate failure modes, and write punishing test content to stress the design and identify bugs. Candidate will analyze coverage gaps and devise strategies to fill coverage holes. The quality of the design and the final product is directly proportional to the quality of the design verification work. Behavioral traits for this position include: Strong problem solving and tolerance of ambiguity.

The ideal candidate should exhibit the following behavioral traits: - Problem-solving Skills - Ability to Multitask - Strong Written and Verbal Communication Skills - Ability to Work in a Dynamic Team-Oriented Environment
Qualifications You must possess a BS or a MS degree in Engineering with 2-4 years' experience across the following areas: - System Verilog VVM/OVM/UVM and/or Object-Oriented Programming Techniques - Verilog and/or similar HDLs - Computer Architecture and Digital Logic - Linux/UNIX and related Tools - Verification Techniques including Assertions, Monitors, Scoreboards, Functional Coverage, and Randomized Regressions - Design/Verification Tools such as VCS, Debussy, Verdi, DVE, DVT, & GDB - Test bench Architecture

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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