If you are passionate about seeing your ideas go from white board to billions of pieces of silicon, join the ground floor of Intel's next generation core design team in Hillsboro, Oregon.
Our goal: to build a revolutionary microprocessor core to power the next decade of computing and create experiences we have yet to dream up. In this position, as a member of the CPU validation team, you will be responsible for defining and implementing formal verification techniques and ensure robust RTL implementation of the next generation core micro-architecture. Your responsibilities may include, but are not limited to, the following: - Investigate and deploy new formal verification techniques and enforcing standard methodologies across the team- Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU- Understand and contribute to micro-architecture specification and define verification strategy for a significant portion of the design- Document formal verification plans and drive technical reviews of plans and proofs with design and architecture teams- Technical ownership of formal verification of one or more micro-architecture blocks through tapein and post-si debug- Identify and create automated formal verification flows for efficient and timely execution- Influence and contribute to post-silicon validation focus and sighting resolution
M.S. in Computer Science or Computer Engineering or Electrical Engineering plus 4 years of relevant work experience OR B.S. in Computer Science or Computer Engineering or Electrical Engineering plus 5 years of relevant work experience.
Total of 4+ years of work experience in the following areas:
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.